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Freescale Semiconductor /MK20D10 /SDHC /IRQSTATEN

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Interpret as IRQSTATEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)CCSEN 0 (0)TCSEN 0 (0)BGESEN 0 (0)DINTSEN 0 (0)BWRSEN 0 (0)BRRSEN 0 (0)CINSEN 0 (0)CRMSEN 0 (0)CINTSEN 0 (0)CTOESEN 0 (0)CCESEN 0 (0)CEBESEN 0 (0)CIESEN 0 (0)DTOESEN 0 (0)DCESEN 0 (0)DEBESEN 0 (0)AC12ESEN 0 (0)DMAESEN

DEBESEN=0, CTOESEN=0, BRRSEN=0, CINSEN=0, BWRSEN=0, CIESEN=0, DTOESEN=0, CRMSEN=0, DMAESEN=0, BGESEN=0, AC12ESEN=0, CCESEN=0, CINTSEN=0, DCESEN=0, TCSEN=0, DINTSEN=0, CEBESEN=0, CCSEN=0

Description

Interrupt Status Enable register

Fields

CCSEN

Command Complete Status Enable

0 (0): Masked

1 (1): Enabled
TCSEN

Transfer Complete Status Enable

0 (0): Masked

1 (1): Enabled
BGESEN

Block Gap Event Status Enable

0 (0): Masked

1 (1): Enabled
DINTSEN

DMA Interrupt Status Enable

0 (0): Masked

1 (1): Enabled
BWRSEN

Buffer Write Ready Status Enable

0 (0): Masked

1 (1): Enabled
BRRSEN

Buffer Read Ready Status Enable

0 (0): Masked

1 (1): Enabled
CINSEN

Card Insertion Status Enable

0 (0): Masked

1 (1): Enabled
CRMSEN

Card Removal Status Enable

0 (0): Masked

1 (1): Enabled
CINTSEN

Card Interrupt Status Enable

0 (0): Masked

1 (1): Enabled
CTOESEN

Command Timeout Error Status Enable

0 (0): Masked

1 (1): Enabled
CCESEN

Command CRC Error Status Enable

0 (0): Masked

1 (1): Enabled
CEBESEN

Command End Bit Error Status Enable

0 (0): Masked

1 (1): Enabled
CIESEN

Command Index Error Status Enable

0 (0): Masked

1 (1): Enabled
DTOESEN

Data Timeout Error Status Enable

0 (0): Masked

1 (1): Enabled
DCESEN

Data CRC Error Status Enable

0 (0): Masked

1 (1): Enabled
DEBESEN

Data End Bit Error Status Enable

0 (0): Masked

1 (1): Enabled
AC12ESEN

Auto CMD12 Error Status Enable

0 (0): Masked

1 (1): Enabled
DMAESEN

DMA Error Status Enable

0 (0): Masked

1 (1): Enabled

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data